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Kioxia’s 2Tb QLC: chip density is not SSD capacity

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  1. The announced device
  2. Convert the density, not the marketing name
  3. More states per cell are not a drive benchmark

A 2Tb NAND chip is not a 2TB SSD. The distinction is especially important here because Kioxia explicitly defines the density unit in binary terms, while its interface speed uses decimal bits per second.

Kioxia’s density convention: 2Tb equals 2 × 2^40 bits; divide by 8 to obtain 274,877,906,944 bytes, or 256 GiB raw. Controller reservations and other overhead separate raw chip density from file capacity; not a 2TB SSD.
Kioxia’s density convention: 2Tb equals 2 × 2^40 bits; divide by 8 to obtain 274,877,906,944 bytes, or 256 GiB raw. Controller reservations and other overhead separate raw chip density from file capacity; not a 2TB SSD. Chart : PeopleAreGeek. Data source.
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The announced device

Kioxia and Sandisk's August 12 announcement describes ninth-generation QLC NAND with six planes and a 4.8 Gb/s interface figure from their test conditions. CBA manufactures the CMOS and memory-array wafers separately before bonding them. The release does not provide a finished SSD's capacity, endurance rating or sustained-write result.

The same source defines 1 Tb as 2^40 bits for density. Its interface-rate footnote instead defines Gb/s using one billion bits per second. Keeping those conventions explicit prevents two different unit errors.

Convert the density, not the marketing name

For the stated chip density, two times 2^40 bits divided by eight equals 274,877,906,944 bytes, or 256 GiB. This is raw nominal chip density expressed in bytes, not space available to store files. It is neither two terabytes nor a guarantee that a drive exposes 256 GiB per chip to the operating system.

Our diagram shows that conversion step by step. A drive combines memory with controller policy, spare areas, metadata and other overhead. Multiplying chip count by raw density gives a starting inventory of bits, not the final formatted capacity.

More states per cell are not a drive benchmark

QLC encodes four bits per cell, so it must distinguish 16 logical states; three-bit TLC uses eight. That arithmetic helps explain why sensing, programming and error management matter. It does not quantify the endurance or latency of a particular finished SSD.

Similarly, an interface speed describes one link in the storage path. Host interface, controller, parallelism, caching and background work all affect delivered throughput. A six-plane design should not be translated directly into six times the performance, or into six times the capacity.

For a storage purchase, seek the actual drive specification and tests covering the intended workload: sustained writes after cache exhaustion, latency under mixed traffic, endurance conditions and usable capacity. Model training can include substantial checkpoint writes, so “AI workload” is not synonymous with read-only storage. This announcement establishes a NAND technology milestone; it does not establish retail pricing, a delivery date or a universally suitable drive for every AI system.

Respect publisher binary density definitions; separate 2Tb chip from usable SSD bytes and interface rate from sustained drive performance.